Staff Engineer NVM Test

Application ends: August 31, 2022
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Job Description

The task includes the design and development of test programs for testing memory blocks (Flash, EEPROM, etc) and analog circuit

* Develop test program for full design verification, characterization, wafer sort and final test including the qualification test program
* Prepare the test program release documentation for the NVM IP’s, circuits and test chips conform to the specification.
* Responsible for full characterization and verification measurements of NVM IP’s
* Create production test programs and prepare the documentation for the release report
* Perform test program conversion or transfer, test time optimization to enhance productivity.
* Execute design verification and circuit analysis together with the IC design operating in a complex test system including laboratory tools for wafer and device tests
* Assist IC designer regarding IP design verification, test parameter analysis
* Collaborate with reliability team to perform verification and qualification of memory IP’s and test chips
* Creation of test and verification reports
* Perform data analyses and the required support
* Develop test strategies and define design for test inputs
* Demonstrate teamwork to interact in a global team within NVM department, inter-department teams including reliability, yield enhancement, product test team, design support team and other related teams that may need support.
* Support any RnD activities related to NVM IP’s that may arise from time to time.

Job Requirement

* Degree in Electrical/Electronic Engineering, Computer Science, Physics, Microelectronics or related subjects.
* Minimum of 5 years’ experience in a semiconductor manufacturing environment specifically in the field of test program development, test equipment and related tests. Have worked as Test Engineer or a similar position with hands-on experience in test systems and test laboratory equipment.
* Experienced in programming with C/C++, e.g. in Memory (Flash, EEPROM, etc) and analog IP, but not mandatory
* Possess experienced in wafer prober station such as TSK, TEL, EG and etc..
* Experienced in Teradyne Maverick, Magnum2 and other memory testers is a plus.
* Reliable, a team player and independent, structured, and enthusiastic in your way of work.
* Have a distinctive ability to communicate in an interdisciplinary environment

Please send your application (preferably by e-mail) with CV and certificates to:

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